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Ключевое слово dsp [83 articles]

Recent papers classified by the tag dsp.
  • notes A Wavelet Tour of Signal Processing, Second Edition (Wavelet Analysis & Its Applications)
    (15 September 1999)
    by Stéphane Mallat
    posted to wavelet reference must-have dsp by yann on 2007-02-01 17:52:40 as read along with 10 people and 1 group ppeeling alexr mvrankic pbellec bigbossman I_Biomed sbarthelme CharlesM fjanoos herrk Autoregulation
  • The latest word in digital and media processing
    Signal Processing Magazine, IEEE, Vol. 15, No. 2. (1998), pp. 59-85.
    by P Faraboschi, G Desoli, JA Fisher
    posted to dsp vliw by visit0r on 2007-12-03 16:33:24 as ****
  • DSPs for energy harvesting sensors: applications and architectures
    Pervasive Computing, IEEE, Vol. 4, No. 3. (2005), pp. 72-79.
    by R Amirtharajah, J Collier, J Siebert, B Zhou, A Chandrakasan
    posted to dsp harvesting sensor by summerxia on 2005-12-06 22:52:20 as ** along with 1 person ingedwar
  • notes How can DNA computing be applied to digital signal processing?
    Signal Processing Magazine, IEEE, Vol. 21, No. 6. (2004), pp. 57-61.
    by SA Tsaftaris, AK Katsaggelos, TN Pappas, ET Papoutsakis
    posted to computing dna dna-based dna_computer dsp by stsaft on 2006-02-12 23:32:31 as read
  • Enzyme-free nucleic acid logic circuits.
    Science, Vol. 314, No. 5805. (8 December 2006), pp. 1585-1588.
    by G Seelig, D Soloveichik, DY Zhang, E Winfree
    posted to winfree logic dsp dna by stsaft on 2007-01-19 22:31:38 as ***** along with 3 people and 1 group satsumakenji cdawson drummstikk GIG
  • The Not So Digital Future of Digital Signal Processing
    Proceedings of the IEEE, Vol. 96, No. 3. (2008), pp. 375-377.
    by SA Tsaftaris, AK Katsaggelos
    posted to dna dsp by stefbel on 2008-03-11 17:55:33 as ** along with 1 person stsaft
  • A new method for designing efficient linear phase recursive filters
    Digital Signal Processing, Vol. 14, No. 1. (January 2004), pp. 1-17.
    by E Arias-De-Reyna, JI Acha
    posted to dsp by shivanandchiremath on 2006-08-29 11:49:37 as **
  • High-speed weighing system based on DSP
    IECON 02 [Industrial Electronics Society, IEEE 2002 28th Annual Conference of the], Vol. 2 (2002), pp. 1579-1583 vol.2.
    by J Calpe, E Soria, M Martinez, V Frances, A Rosado, L Gomez-Chova, J Vila
    posted to dsp by seudonimo_falso on 2006-08-07 16:05:42 as **
  • Implementing DSP functions in FPGAs
    WESCON/'95. Conference record. 'Microelectronics Communications Technology Producing Quality Products Mobile and Portable Power Emerging Technologies' (1995), 250.
    by L Ferguson, J Rosenberg
    posted to dsp fpga by Seenu on 2006-09-20 18:48:04 as **
  • Automatic implementation of FIR filters on field programmable gate arrays
    Signal Processing Letters, IEEE, Vol. 2, No. 3. (1995), pp. 51-53.
    by S Mohanakrishnan, JB Evans
    posted to dsp fpga by Seenu on 2006-09-20 18:48:39 as **
  • Reconfigurable computing for digital signal processing: A survey
    Journal of VLSI Signal Processing, Vol. 28, No. 1. (June 2001), pp. 7-27.
    by R Tessier, W Burleson
    posted to computing dsp reconfigurable by Seenu on 2007-09-27 08:10:48 as ** along with 2 people and 1 group nevarcds hn82123 Reconfigurable Computing
  • Mixed DSP/FPGA implementation of an error-resilient image transmission system based on JPEG2000
    Signals, Systems and Computers, 2001. Conference Record of the Thirty-Fifth Asilomar Conference on, Vol. 2 (2001), pp. 1330-1334 vol.2.
    by M Grangetto, E Magli, M Martina, F Vacca
    posted to applications dsp fpga image by Seenu on 2006-08-09 22:19:33 as **
  • Energy- and Time-Efficient Matrix Multiplication on FPGAs
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 13, No. 11. (2005), pp. 1305-1319.
    by JW Jang, SB Choi, VK Prasanna
    posted to dsp fpga by Seenu on 2006-04-13 20:57:55 as ** along with 1 person smithmc
  • Direct digital synthesis: some options for FPGA implementation
    Reconfigurable Technology: FPGAs for Computing and Applications, Vol. 3844, No. 1. (1999), pp. 2-10.
    by Chris H Dick, Fred J Harris
    edited by John Schewel, Peter M Athanas, Steven A Guccione, Stefan Ludwig, John T Mchenry
    posted to dsp fpga by Seenu on 2006-04-20 17:44:48 as **
  • Modular VLSI architectures for computing the arithmetic Fourier transform
    Signal Processing, IEEE Transactions on [see also Acoustics, Speech, and Signal Processing, IEEE Transactions on], Vol. 41, No. 6. (1993), pp. 2236-2246.
    by H Park, VK Prasanna
    posted to dsp vlsi by Seenu on 2006-04-13 20:53:42 as **
  • Fast implementation of non-linear filters using FPGAs
    Non-Linear Signal and Image Processing (Ref. No. 1998/284), IEE Colloquium on (1998), pp. 13/1-13/5.
    by N Woolfries, P Lysaght, S Marshall, G Mcgregor, D Robinson
    posted to dsp fpga by Seenu on 2006-04-13 20:42:17 as **
  • Performance evaluation and optimal design for FPGA-based digit-serial DSP functions
    Computers & Electrical Engineering, Vol. 29, No. 2. (March 2003), pp. 357-377.
    by Hanho Lee, Gerald E Sobelman
    posted to applications dsp fpga by Seenu on 2006-09-20 18:46:30 as **
  • Hardware Architectures for Adaptive Background Modelling
    Programmable Logic, 2007. SPL '07. 2007 3rd Southern Conference on (2007), pp. 149-154.
    by Matti P Juvonen, Jose G Coutinho, Wayne Luk
    posted to applications dsp fpga by Seenu on 2007-09-30 05:27:01 as **
  • Reconfigurable Computing for Digital Signal Processing: A Survey
    The Journal of VLSI Signal Processing, Vol. 28, No. 1 - 2. (May 2001), pp. 7-27.
    by Russell Tessier, Wayne Burleson
    posted to dsp fpga reconfigurable by Seenu on 2006-07-14 22:46:38 as ** along with 3 people and 1 group mmuecke gantlord peskin Reconfigurable Computing
  • Task allocation and scheduling models for multiprocessor digital signal processing
    Acoustics, Speech, and Signal Processing [see also IEEE Transactions on Signal Processing], IEEE Transactions on, Vol. 38, No. 12. (1990), pp. 2151-2161.
    by K Konstantinides, RT Kaneshiro, JR Tani
    posted to dsp multiprocessor scheduling by ppschedule on 2008-07-09 04:37:47 as ** along with 1 person kvm
  • Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey
    The Journal of VLSI Signal Processing, Vol. V39, No. 3. (1 March 2005), pp. 213-235.
    by Alireza Shoa, Shahram Shirani
    posted to dsp reconfigurable by peskin on 2008-07-06 01:41:07 as ** along with 2 people ceegrs2 hn82123
  • A reconfigurable computing architecture for microsensors
    Field-Programmable Custom Computing Machines, 2000 IEEE Symposium on (2000), pp. 59-67.
    by S Scalera, M Falco, B Nelson
    posted to dsp reconfigurable by peskin on 2005-11-03 01:46:36 as ****
  • Reconfigurable computer origins: the UCLA fixed-plus-variable (F+V) structure computer
    IEEE Ann. Hist. Comput., Vol. 24, No. 4. (October 2002), pp. 3-9.
    by Gerald Estrin
    posted to dsp eigenvalue reconfigurable by peskin on 2005-11-04 18:32:22 as ****
  • On the implementation of 128-pt FFT/IFFT for high-performance WPAN
    Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on (2005), pp. 5513-5516 Vol. 6.
    by C Huggett, K Maharatna, K Paul
    posted to dsp reconfigurable by peskin on 2008-07-26 21:58:20 as **
  • Automatic conversion of floating point MATLAB programs into fixed point FPGA based hardware design
    Field-Programmable Custom Computing Machines, 2003. FCCM 2003. 11th Annual IEEE Symposium on (2003), pp. 263-264.
    by P Banerjee, D Bagchi, M Haldar, A Nayak, V Kim, R Uribe
    posted to dinel dsp jonas matt paul reconfigurable by peskin on 2008-01-29 15:41:43 as ***** along with 1 person jhibbits
  • Towards a reconfigurable tracking system
    Field Programmable Logic and Applications, 2005. International Conference on (2005), pp. 456-462.
    by SC Wong, M Jasiunas, D Kearney
    posted to dsp recognition reconfigurable by peskin on 2005-10-21 18:43:56 as ***** along with 1 person Seenu
  • Reconfigurable processing: the solution to low-power programmable DSP
    Acoustics, Speech, and Signal Processing, 1997. ICASSP-97., 1997 IEEE International Conference on, Vol. 1 (1997), pp. 275-278 vol.1.
    by JM Rabaey
    posted to dsp reconfigurable by peskin on 2008-07-06 14:11:07 as **
  • Partial shape recognition by sub-matrix matching for partial matching guided image labeling
    Pattern Recognition, Vol. 38, No. 10. (October 2005), pp. 1560-1573.
    by Eli Saber, Yaowu Xu, Murat
    posted to dsp eli matching partial recognition by peskin on 2005-09-09 22:40:51 as read
  • Real-time 2-D feature detection on a reconfigurable computer
    Computer Vision and Pattern Recognition, 1998. Proceedings. 1998 IEEE Computer Society Conference on (1998), pp. 586-593.
    by A Benedetti, P Perona
    posted to dsp recognition reconfigurable segmentation by peskin on 2005-11-04 18:42:18 as **
  • Organization of a “Fixed-Plus-Variable” Structure Computer for Computation of Eigenvalues and Eigenvectors of Real Symmetric Matrices
    J. ACM, Vol. 9, No. 1. (January 1962), pp. 41-60.
    by G Estrin, CR Viswanathan
    posted to dsp eigenvalue reconfigurable by peskin on 2005-11-04 18:30:01 as ****
  • Compiling and optimizing image processing algorithms for FPGAs
    Computer Architectures for Machine Perception, 2000. Proceedings. Fifth IEEE International Workshop on (2000), pp. 222-231.
    by B Draper, W Najjar, W Bohm, J Hammes, B Rinker, C Ross, M Chawathe, J Bins
    posted to dsp reconfigurable by peskin on 2005-11-04 18:59:26 as *****
  • Singular value decomposition on distributed reconfigurable systems
    Rapid System Prototyping, 12th International Workshop on, 2001. (2001), pp. 38-43.
    by C Bobda, N Steenbock
    posted to dsp eigenvalue reconfigurable by peskin on 2005-11-04 18:36:17 as ****
  • Implementation of a FFT/IFFT Module on FPGA: Comparison of Methodologies
    Programmable Logic, 2008 4th Southern Conference on (2008), pp. 7-11.
    by J Viejo, A Millan, MJ Bellido, E Ostua, P Ruiz-De-Clavijo, A Munoz
    posted to dsp fft reconfigurable by peskin on 2008-07-26 22:08:31 as **
  • Overview of a compiler for synthesizing MATLAB programs onto FPGAs
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 12, No. 3. (2004), pp. 312-324.
    by P Banerjee, M Haldar, A Nayak, V Kim, V Saxena, S Parkes, D Bagchi, S Pal, N Tripathi, N Tripathi, D Zaretsky, A10, R Anderson, A11, JR Uribe, A12
    posted to dinel dsp jonas matt paul reconfigurable by peskin on 2008-01-29 15:34:50 as ***** along with 1 person jhibbits
  • Comparison of Filtering Methods for fMRI Datasets
    NeuroImage, Vol. 10, No. 5. (November 1999), pp. 530-543.
    by F Kruggel, DY von Cramon, X Descombes
    posted to dsp fmri by pervane on 2006-11-14 15:06:39 as ** along with 3 people and 2 groups mbolding negar pbellec Functional_Imaging Neuroscience
  • Evaluating Lowpass Filters for fMRI Temporal Analysis
    by Peter Bannister, Stephen Smith, Michael Brady, David Flitney, Mark Woolrich
    posted to dsp fmri by pervane on 2006-11-15 20:49:16 as **
  • A novel method for calculating the convolution sum of two finite length sequences
    Education, IEEE Transactions on, Vol. 39, No. 1. (1996), pp. 77-80.
    by JW Pierre
    posted to dsp by pervane on 2007-03-27 19:39:13 as **
  • AsAP: An Asynchronous Array of Simple Processors
    Solid-State Circuits, IEEE Journal of, Vol. 43, No. 3. (2008), pp. 695-705.
    by Z Yu, MJ Meeuwsen, RW Apperson, O Sattari, M Lai, JW Webb, EW Work, D Truong, T Mohsenin, T Mohsenin, BM Baas, A10
    posted to async dsp by nchandra on 2008-03-27 10:11:32 as read
  • Fast factorization architecture in soft-decision Reed-Solomon decoding
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 13, No. 4. (2005), pp. 413-426.
    by Xinmiao Zhang, KK Parhi
    posted to coding dsp by nchandra on 2005-12-13 12:35:22 as ** along with 1 person danielaugot
  • Wattch: a framework for architectural-level power analysis and optimizations
    (2000), pp. 83-94.
    by David Brooks, Vivek Tiwari, Margaret Martonosi
    posted to benchmark dsp by nchandra on 2008-02-14 12:42:00 as **
  • The hierarchical timing pair model for multirate DSP applications
    Signal Processing, IEEE Transactions on [see also Acoustics, Speech, and Signal Processing, IEEE Transactions on], Vol. 52, No. 5. (2004), pp. 1209-1217.
    by N Chandrachoodan, SS Bhattacharyya, KJR Liu
    posted to cad dsp by nchandra on 2005-10-12 14:48:44 as read
  • Digital signal processing in continuous time: a possibility for avoiding aliasing and reducing quantization error
    Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04). IEEE International Conference on, Vol. 2 (2004), pp. ii-589-92 vol.2.
    by Y Tsividis
    posted to dsp by nchandra on 2005-11-05 14:41:26 as **
  • CHARMED: a multi-objective co-synthesis framework for multi-mode embedded systems
    Application-Specific Systems, Architectures and Processors, 2004. Proceedings. 15th IEEE International Conference on (2004), pp. 28-40.
    by V Kianzad, SS Bhattacharyya
    posted to cad dsp by nchandra on 2005-10-12 14:52:40 as **
  • Theoretical Analysis of Word-Level Switching Activity in the Presence of Glitching and Correlation
    (1999)
    by Janardhan H Satyanarayana, Keshab K Parhi
    posted to arithmetic dsp for_thesis multiplier power power_estimation by nathalie on 2006-04-18 16:58:07 as **
  • Overview of the FREEDOM compiler for mapping DSP software to FPGAs
    Field-Programmable Custom Computing Machines, 2004. FCCM 2004. 12th Annual IEEE Symposium on (2004), pp. 37-46.
    by D Zaretsky, M Mittal, Xiaoyong Tang, P Banerjee
    posted to arithmetic dsp for_thesis fpga fpl_paper printed xilinx by nathalie on 2006-02-10 19:29:03 as **
  • An FPGA architecture with enhanced datapath functionality
    (2003), pp. 195-204.
    by Katarzyna Leijten-Nowak, Jef L van Meerbergen
    posted to architecture arithmetic dsp for_thesis fpga fpl_paper printed by nathalie on 2006-02-16 21:05:42 as read
  • A verilog RTL synthesis tool for heterogeneous FPGAs
    Field Programmable Logic and Applications, 2005. International Conference on (2005), pp. 305-310.
    by P Jamieson, J Rose
    posted to altera arithmetic coarse_grained_architectures dsp for_thesis fpga fpl_paper logic_synthesis printed synthesis technology_mapping by nathalie on 2006-02-19 21:11:59 as read
  • notes Synthesis of low power linear DSP circuits using activity metrics
    VLSI Design, 1994., Proceedings of the Seventh International Conference on (1994), pp. 265-270.
    by A Chatterjee, RK Roy
    posted to adder arithmetic dsp multiplier power power_estimation printed synthesis by nathalie on 2006-03-05 01:39:45 as read
  • The Computer Music Tutorial
    (27 February 1996)
    by Curtis Roads
    posted to synthesis electronic_music dsp audio by lossius on 2007-01-25 21:03:58 as read along with 1 person korayt
  • Computer Music: Synthesis, Composition, and Performance
    (02 July 1997)
    by Charles Dodge, Thomas A Jerse
    posted to audio dsp synthesis by lossius on 2007-01-02 10:24:45 as read along with 1 person PeterReid
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