Регистрация | Вход в службу | FAQ      [?] 

Ключевое слово interconnect [66 articles]

Recent papers classified by the tag interconnect.
  • Hybrid approach to structured ASICs for minimizing the impact of reticle costs and interconnect delay
    Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004 (2004), pp. 427-429.
    by J Brown, R Packer, J Prasad, K Kofford, T Dye, B Kirk
    posted to interconnect structured_asic by scottc on 2005-03-15 10:42:40 as *****
  • An architectural exploration of via patterned gate arrays
    (2003), pp. 184-189.
    by Chetan Patel, Anthony Cozzie, Herman Schmit, Larry Pileggi
    posted to interconnect layout mask_programmable regular_fabric switch_block via_programmable vpga by scottc on 2005-03-15 21:12:49 as read
  • Quantum-dot Field Programmable Gate Array: enhanced routing
    Optoelectronic and Microelectronic Materials and Devices, 2006 Conference on (2006), pp. 121-124.
    by A Jazbec, N Zimic, IL Bajec, P Pecar, M Mraz
    posted to interconnect qca-prorammable by Ruchi on 2008-04-01 18:42:35 as read
  • The Stratix II logic and routing architecture
    (2005), pp. 14-20.
    by David Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David Galloway, Mike Hutton, Chris Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron Mcclintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose
    posted to altera architecture fpga interconnect printed routing by nathalie on 2005-05-12 22:18:40 as **
  • Design of Interconnection Networks for Programmable Logic
    (30 November 2003)
    by Guy Lemieux, David Lewis
    posted to fpga interconnect routing by nathalie on 2005-05-19 20:40:47 as **
  • Circuit design, transistor sizing and wire layout of FPGA interconnect
    Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999 (1999), pp. 171-174.
    by V Betz, J Rose
    posted to fpga interconnect vlsi by nathalie on 2005-11-04 03:21:52 as ** along with 1 person gane5h
  • Directional and single-driver wires in FPGA interconnect
    Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on (2004), pp. 41-48.
    by G Lemieux, E Lee, M Tom, A Yu
    posted to altera architecture for_thesis fpga interconnect routing xilinx by nathalie on 2006-08-28 04:10:16 as **
  • A New Switch Block for Segmented FPGAs
    (1999), pp. 274-281.
    by Imran M Masud, Steven JE Wilton
    posted to architecture for_thesis fpga interconnect routing by nathalie on 2006-08-11 06:24:42 as **
  • Universal switch modules for FPGA design
    ACM Trans. Des. Autom. Electron. Syst., Vol. 1, No. 1. (January 1996), pp. 80-101.
    by Yao-Wen Chang, DF Wong, CK Wong
    posted to architecture for_thesis fpga interconnect routing by nathalie on 2006-08-11 06:21:38 as **
  • On two-step routing for FPGAS
    (1997), pp. 60-66.
    by Guy GF Lemieux, Stephen D Brown, Daniel Vranesic
    posted to architecture for_thesis interconnect routing xilinx by nathalie on 2006-08-11 06:12:00 as **
  • The Design of a Low Energy FPGA
    Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on (1999), pp. 188-193.
    by V George, Hui Zhang, J Rabaey
    posted to architecture for_thesis fpga interconnect lut power power_estimation power_measurement routing xilinx by nathalie on 2006-09-01 01:45:28 as **
  • Low-power High-level Synthesis for FPGA Architectures
    Low Power Electronics and Design, 2003. ISLPED '03. Proceedings of the 2003 International Symposium on (2003), pp. 134-139.
    by Deming Chen, J Cong, Yiping Fan
    posted to activity fpga interconnect power power_estimation synthesis by nathalie on 2006-09-01 01:34:03 as **
  • Power Estimation Techniques for FPGAs
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 12, No. 10. (2004), pp. 1015-1027.
    by JH Anderson, FN Najm
    posted to activity for_thesis fpga interconnect power power_estimation vlsi xilinx by nathalie on 2006-09-01 01:12:59 as ** along with 1 person ceegrs2
  • Circuit design of routing switches
    (2002), pp. 19-28.
    by Guy Lemieux, David Lewis
    posted to architecture fpga interconnect routing by nathalie on 2005-05-13 00:17:38 as ***
  • FPGA switch block layout and evaluation
    (2002), pp. 11-18.
    by Herman Schmit, Vikas Chandra
    posted to architecture fpga interconnect by nathalie on 2005-05-13 00:14:55 as ****
  • The stratix routing and logic architecture
    (2003), pp. 12-20.
    by David Lewis, Vaughn Betz, David Jefferson, Andy Lee, Chris Lane, Paul Leventis, Sandy Marquardt, Cameron Mcclintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose
    posted to altera architecture fpga interconnect printed routing by nathalie on 2005-05-12 23:15:57 as **
  • ExpressEther - Ethernet-Based Virtualization Technology for Reconfigurable Hardware Platform
    (2006), pp. 45-51.
    by Jun Suzuki, Yoichi Hidaka, Junichi Higuchi, Takashi Yoshikawa, Atsushi Iwata
    posted to asplos08 eth hoti interconnect interconnects nec pci pci-e by muli on 2008-03-03 15:50:51 as **
  • A power-optimal repeater insertion methodology for global interconnects in nanometer designs
    Electron Devices, IEEE Transactions on, Vol. 49, No. 11. (2002), pp. 2001-2007.
    by K Banerjee, A Mehrotra
    posted to interconnect low power repeater by mobius2004 on 2005-09-15 19:19:21 as read
  • Low power repeaters driving RC interconnects with delay and bandwidth constraints
    SOC Conference, 2004. Proceedings. IEEE International (2004), pp. 335-339.
    by Guoqing Chen, EG Friedman
    posted to bandwidth interconnect low power repeater by mobius2004 on 2005-09-15 19:14:33 as *****
  • A probabilistic framework for power-optimal repeater insertion in global interconnects under parameter variations
    (2005), pp. 131-136.
    by Vineet Wason, Kaustav Banerjee
    posted to interconnect process repeater variations by mobius2004 on 2005-09-15 19:11:43 as **
  • Interconnect Effort - A Unification of Repeater Insertion and Logical Effort
    (2003)
    by Srividya Srinivasaraghavan, Wayne Burleson
    posted to effort interconnect logical repeater by mobius2004 on 2005-09-15 19:08:56 as **
  • Exploiting the on-chip inductance in high-speed clock distribution networks
    IEEE Trans. Very Large Scale Integr. Syst., Vol. 9, No. 6. (December 2001), pp. 963-973.
    by Yehea I Ismail, Eby G Friedman, Jose L Neves
    posted to clock inductance interconnect by mobius2004 on 2005-09-15 19:00:44 as ** along with 1 person and 2 groups A_Olympia Philosophy_of_Information Blog_and_Wiki_Research
  • Repeater insertion in tree structured inductive interconnect
    (1999), pp. 420-424.
    by Yehea I Ismail, Eby G Friedman, Jose L Neves
    posted to inductance interconnect repeater by mobius2004 on 2005-09-15 18:59:26 as *****
  • notes Analysis of on-chip inductance effects using a novel performance optimization methodology for distributed RLC interconnects
    Design Automation Conference, 2001. Proceedings (2001), pp. 798-803.
    by K Banerjee, A Mehrotra
    posted to inductance interconnect rlc by mobius2004 on 2005-09-15 18:57:30 as *****
  • Accurate analysis of on-chip inductance effects and implications for optimal repeater insertion and technology scaling
    VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on (2001), pp. 195-198.
    by K Banerjee, A Mehrotra
    posted to inductance interconnect repeater by mobius2004 on 2005-09-15 18:56:05 as *****
  • Analysis of on-chip inductance effects for distributed RLC interconnects
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 21, No. 8. (2002), pp. 904-915.
    by K Banerjee, A Mehrotra
    posted to inductance interconnect rlc by mobius2004 on 2005-09-15 18:54:48 as *****
  • Effects of inductance on the propagation delay and repeater insertion in VLSI circuits
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 8, No. 2. (2000), pp. 195-206.
    by YI Ismail, EG Friedman
    posted to delay interconnect repeater by mobius2004 on 2005-09-15 18:38:10 as *****
  • Variational delay metrics for interconnect timing analysis
    Design Automation Conference, 2004. Proceedings. 41st (2004), pp. 381-384.
    by K Agarwal, D Sylvester, D Blaauw, F Liu, S Nassif, S Vrudhula
    posted to interconnect process variation by mobius2004 on 2005-09-15 18:23:14 as *****
  • Analysis of on-chip inductance effects using a novel performance optimization methodology for distributed <italic>RLC</italic> interconnects
    (2001), pp. 798-803.
    by Kaustav Banerjee, Amit Mehrotra
    posted to inductance interconnect by mobius2004 on 2005-09-13 01:25:31 as *****
  • A NUCA model for embedded systems cache design
    Embedded Systems for Real-Time Multimedia, 2005. 3rd Workshop on (2005), pp. 41-46.
    by P Foglia, D Mangano, CA Prete
    posted to non-uniform-cache memory-access-pattern interconnect embedded-processor cache by mamadoudiao on 2008-05-13 16:43:45 as **
  • Interconnect design considerations for large NUCA caches
    (2007), pp. 369-380.
    by Naveen Muralimanohar, Rajeev Balasubramonian
    posted to non-uniform-cache memory-access-pattern interconnect cache by mamadoudiao on 2008-05-02 18:54:12 as **
  • Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
    Microarchitecture, 2007. MICRO 2007. 40th Annual IEEE/ACM International Symposium on (2007), pp. 3-14.
    by Naveen Muralimanohar, Rajeev Balasubramonian, Norm Jouppi
    posted to simulator non-uniform-cache interconnect cacti cache by mamadoudiao on 2008-05-13 16:50:07 as **
  • An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches
    (2002), pp. 211-222.
    by Changkyu Kim, Doug Burger, Stephen W Keckler
    posted to non-uniform-cache memory-access-pattern interconnect cache by mamadoudiao on 2008-05-02 19:00:01 as ** along with 1 person dschuff
  • Neck development in metal/elastomer bilayers under dynamic stretchings
    International Journal of Solids and Structures, Vol. 45, No. 13. (30 June 2008), pp. 3769-3778.
    by Zhenyu Xue, John W Hutchinson
    posted to thin-metal-film stretchability polymer-substrate necking modeling mechanics localization interconnect ijss hutchinson ductility 2008 by Macroelectronics on 2008-06-30 19:35:08 as ** along with 1 person and 1 group ZhaoZhang Macroelectronics
  • Stretchable interconnects for elastic electronic surfaces
    Proceedings of the IEEE, Vol. 93, No. 8. (2005), pp. 1459-1467.
    by SP Lacour, J Jones, S Wagner, Teng Li, Zhigang Suo
    posted to applications flexible-electronics interconnect macroelectronics materials mechanics polymer-substrate stretchability technology by Macroelectronics on 2006-07-03 02:44:04 as ***** along with 2 people and 1 group liteng suopublications Macroelectronics
  • Electromigration performance enhancement of Cu interconnects with PVD Ta cap
    Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International (2004), pp. 627-628.
    by D Gajewski, T Meixner, B Feil, M Lien, J Walls
    posted to interconnect reliability by kewms on 2005-03-31 00:05:03 as **
  • Specular spectral profilometry on metal layers
    Metrology, Inspection, and Process Control for Microlithography XIV, Vol. 3998, No. 1. (2000), pp. 882-892.
    by Junwei Bao, Xinhui Niu, Nickhil H Jakatdar, Costas J Spanos, Joseph J Bendik
    edited by Neal T Sullivan
    posted to interconnect metrology scatterometry by kewms on 2006-06-02 18:28:48 as read
  • Interfacial sliding and plasticity in back-end interconnect structures of microelectronic devices
    Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004. EuroSimE 2004. Proceedings of the 5th International Conference on (2004), pp. 83-90.
    by I Dutta, C Park, J Vella, D Pan
    posted to interconnect reliability by kewms on 2005-03-31 00:04:44 as **
  • Reliability challenges and recent advances for Cu interconnects
    Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004. EuroSimE 2004. Proceedings of the 5th International Conference on (2004), pp. 15-16.
    by P Ho, Ki-Don Lee, S Yoon, Guotao Wang
    posted to interconnect reliability by kewms on 2005-03-31 00:04:24 as **
  • Dynamic study of the physical processes in the intrinsic line electromigration of deep-submicron copper and aluminum interconnects
    Device and Materials Reliability, IEEE Transactions on, Vol. 4, No. 3. (2004), pp. 450-456.
    by Cher M Tan, Guan Zhang, Zhenghao Gan
    posted to interconnect reliability by kewms on 2005-03-31 00:02:08 as read
  • Process roadmap and challenges for metal barriers [copper interconnects]
    Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International (2003), pp. 35.1.1-35.1.4.
    by P Moon, V Dubin, S Johnston, J Leu, K Raol, C Wu
    posted to copper interconnect by kewms on 2005-09-13 16:01:59 as read
  • Integration and reliability of Cu-SiOC interconnect for ArF/90-nm node CMOS technology
    Electron Devices, IEEE Transactions on, Vol. 51, No. 12. (2004), pp. 2168-2174.
    by J Noguchi, T Oshima, N Konishi, K Ishikawa, K Sato, S Uno, S Hotta, T Saito, H Aoki
    posted to interconnect reliability by kewms on 2005-03-30 23:59:18 as read
  • Comparison of copper interconnect electromigration behaviors in various structures for advanced BEOL technology
    Physical and Failure Analysis of Integrated Circuits, 2004. IPFA 2004. Proceedings of the 11th International Symposium on the (2004), pp. 177-180.
    by M Lin, Y Lin, G Yang, M Yeh, K Chang, K Su, Tahui Wang
    posted to interconnect reliability by kewms on 2005-03-30 23:58:29 as **
  • Technology and reliability constrained future copper interconnects. I. Resistance modeling
    Electron Devices, IEEE Transactions on, Vol. 49, No. 4. (2002), pp. 590-597.
    by P Kapur, JP Mcvittie, KC Saraswat
    posted to copper interconnect by kewms on 2005-09-13 15:49:41 as read
  • Modeling of interfacial sliding and film crawling in back-end structures of microelectronic devices
    Thermal and Thermomechanical Phenomena in Electronic Systems, 2004. ITHERM '04. The Ninth Intersociety Conference on, Vol. 2 (2004), pp. 137-144 Vol.2.
    by I Dutta, C Park, K Peterson, J Vella, D Pan
    posted to interconnect reliability by kewms on 2005-03-30 23:58:04 as **
  • A 65nm-node, Cu interconnect technology using porous SiOCH film (k=2.5) covered with ultra-thin, low-k pore seal (k=2.7)
    Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International (2003), pp. 35.2.1-35.2.4.
    by M Tada, Y Harada, T Tamura, N Inoue, F Ito, M Yoshiki, H Ohtake, M Narihiro, M Tagami, M Ueki, K Hijioka, M Abe, T Takeuchi, S Saito, T Onodera, N Furutake, K Arai, K Fujii, Y Hayashi
    posted to interconnect reliability by kewms on 2005-03-30 23:57:31 as **
  • An ultra-thin ALD TaN barrier for high-performance Cu interconnects
    Semiconductor Manufacturing, 2003 IEEE International Symposium on (2003), pp. 454-456.
    by H Chung, M Chang, S Chu, N Kumar, K Goto, N Maity, S Sankaranarayanan, H Okamura, N Ohtsuka, S Ogawa
    posted to interconnect reliability by kewms on 2005-03-30 23:56:52 as **
  • Electromigration reliability of Cu interconnects and the impact of low-k dielectrics
    Physical and Failure Analysis of Integrated Circuits, 2003. IPFA 2003. Proceedings of the 10th International Symposium on the (2003), pp. 59-62.
    by P Ho, K Lee, E Ogawa, X Lu, H Matsuhashi
    posted to interconnect reliability by kewms on 2005-03-30 23:56:03 as **
  • High performance/reliability Cu interconnect with selective CoWP cap
    VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on (2003), pp. 109-110.
    by T Ko, C Chang, S Chou, M Lin, C Lin, C Shih, H Su, M Tsai, W Shue, M Liang
    posted to interconnect reliability by kewms on 2005-03-30 23:55:33 as **
  • Cu Planarization for ULSI Processing by Electrochemical Methods: A Review
    Semiconductor Manufacturing, IEEE Transactions on, Vol. 18, No. 3. (2005), pp. 341-349.
    by II Suni, B Du
    posted to copper interconnect polishing by kewms on 2005-09-13 14:58:32 as read
    • Вы можете ссылаться на эту страницу по адресу: http://www.citeulike.org/tag/interconnect

    Result page: 1 2 Next RIS BibTeX
    CiteULike organises scholarly (or academic) papers or literature and provides bibliographic (which means it makes bibliographies) for universities and higher education establishments. It helps undergraduates and postgraduates. People studying for PhDs or in postdoctoral (postdoc) positions. The service is similar in scope to EndNote or RefWorks or any other reference manager like BibTeX, but it is a social bookmarking service for scientists and humanities researchers.