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iammealva extension [23 articles]

Recent papers added to iammealva library classified by the tag extension. You can also see everyone's extension.
  • OneChip: An FPGA Processor with Reconfigurable Logic
    (1996), pp. 126-135.
    by R Wittig, P Chow
    edited by Kenneth L Pocek, Jeffrey Arnold
    posted to architecture extension instruction-set by iammealva on 2008-02-17 08:43:50 as **
  • CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
    (2000), pp. 225-235.
    by Zhi A Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee
    posted to architecture extension instruction-set by iammealva on 2008-02-13 13:48:21 as read
  • A High-Performance Microarchitecture with Hardware-Programmable Functional Units
    (1994), pp. 172-80.
    by R Razdan, MD Smith
  • DISC: the dynamic instruction set computer
    (1995), pp. 92-103.
    edited by John Schewel
  • notes Designing domain-specific processors
    (2001), pp. 61-66.
    by Marnix Arnold, Henk Corporaal
    posted to extension instruction-set by iammealva on 2008-02-11 08:47:57 as read
  • Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization
    (2004), pp. 30-40.
    by Nathan Clark, Manjunath Kudlur, Hyunchul Park, Scott Mahlke, Krisztian Flautner
  • Efficient instruction encoding for automatic instruction set design of configurable ASIPs
    (2002), pp. 649-654.
    by Jong-Eun Lee, Kiyoung Choi, Nikil Dutt
  • Exploiting forwarding to improve data bandwidth of instruction-set extensions
    (2006), pp. 43-48.
    by Ramkumar Jayaseelan, Haibin Liu, Tulika Mitra
  • Scalable custom instructions identification for instruction-set extensible processors
    (2004), pp. 69-78.
    by Pan Yu, Tulika Mitra
  • Fast Identification of Custom Instructions for Extensible Processors
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 26, No. 2. (2007), pp. 359-368.
    by X Chen, DL Maskell, Y Sun
  • Instruction-set-extension exploration using decomposable heuristic search
    VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on (2006), 6 pp..
  • An efficient approach to custom instruction set generation
    Embedded and Real-Time Computing Systems and Applications, 2005. Proceedings. 11th IEEE International Conference on (2005), pp. 547-550.
    by Guangwei Zou, Xiang Liu
  • An architecture framework for transparent instruction set customization in embedded processors
    Computer Architecture, 2005. ISCA '05. Proceedings. 32nd International Symposium on (2005), pp. 272-283.
    by N Clark, J Blome, M Chu, S Mahlke, S Biles, K Flautner
  • notes Fast instruction set customization
    Embedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004. 2nd Workshop on (2004), pp. 53-58.
    by E Borin, F Klein, N Moreano, R Azevedo, G Araujo
  • notes A design flow for configurable embedded processors based on optimized instruction set extension synthesis
    (2006), pp. 581-586.
  • Battery-aware instruction generation for embedded processors
    (2005), pp. 553-556.
    by Newton Cheung, Sri Parameswaran, J&\#246;rg Henkel
  • notes Automatic selection of application-specific instruction-set extensions
    (2006), pp. 160-165.
    by Carlo Galuzzi, Elena M Panainte, Yana Yankova, Koen Bertels, Stamatis Vassiliadis
  • Scalable subgraph mapping for acyclic computation accelerators
    (2006), pp. 147-157.
    by Nathan Clark, Amir Hormati, Scott Mahlke, Sami Yehia
  • Instruction set extension with shadow registers for configurable processors
    (2005), pp. 99-106.
    by Jason Cong, Yiping Fan, Guoling Han, Ashok Jagannathan, Glenn Reinman, Zhiru Zhang
  • Feedback driven instruction-set extension
    (2004), pp. 126-135.
    by Uwe Kastens, Dinh K Le, Adrian Slowik, Michael Thies
  • notes Code transformation strategies for extensible embedded processors
    (2006), pp. 242-252.
    by Paolo Bonzini, Laura Pozzi
  • notes An integer linear programming approach for identifying instruction-set extensions
    (2005), pp. 172-177.
    by Kubilay Atasu, G&\#252;nhan D&\#252;ndar, Can &\#214;zturan
  • Exploiting pipelining to relax register-file port constraints of instruction-set extensions
    (2005), pp. 2-10.
    by Laura Pozzi, Paolo Ienne
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